The USB specification is intended to facilitate the interoperation of devices, such as from different vendors, in an open architecture. USB data is encoded using differential signaling (i.e. two wires transfer the information) in the form of the difference between the signal levels of those two wires. The USB specification is intended as an enhancement to the PC architecture, in portable, desktop and home environments.
The USB specification assumes that devices differ. This is true for the intended environments in which devices from a multiplicity of manufacturers are connected, but there exist other environments (such as certain common industrial or laboratory environments) that require a specification for operating multiple devices of a similar nature in a synchronized manner. The specification does not sufficiently address this issue. Such environments are typically those where testing, measuring or monitoring is performed, and which require the devices to be synchronized to a more accurate degree than is specified. The USB specification allows limited inter-device synchronization by providing a 1 kHz clock signal to all devices. However, many laboratory and industrial environments require synchronization at megahertz frequencies and higher.
USB employs a tiered star topology, where hubs provide attachment points for USB devices. The USB host controller which is located on the user's personal computer (PC), laptop or personal digital assistant (PDA) contains the root hub, which is the origin of all USB ports in the system. The root hub provides a number of USB ports to which USB functional devices or additional hubs may be attached.
In turn, one can attach more hubs (such as USB composite devices) to any of these ports, which then provide additional attachment points via ports for further USB devices. In this way, USB allows up to 127 devices (including hubs) to be connected, though no device may be more than five levels deep.
The root hub in the host transmits a Start of Frame (SOF) signal packet every 1 ms to every device, the time between two SOF packets being termed a frame. Each module receives this SOF packet at a different time, owing to signal transmission delays inevitable in a USB topology. The topology means that there may be a significant time delay (specified as ≦380 ns) for receiving the same signal between a device that is connected directly to the host controller and a device that is five levels down. This is a severe restriction when there is a need to synchronize devices at megahertz levels and above. Furthermore the USB specification allows the host controller to fail to transmit up to five consecutive SOF tokens.
In one existing approach, synchronization between a USB host and a USB device is possible by two types of USB transfers, Interrupt and Isochronous. Interrupt transfers provide guaranteed polling frequencies of devices with minimum periods of 125 μs, whereas isochronous transfers guarantee a constant transfer rate. Both methods require there to be traffic between the device and host for synchronization to take place and therefore reserve more bandwidth for higher degrees of synchronization. However, this means that the available USB bandwidth can be used up before the maximum number of devices has been connected. This approach also imposes on the host the computational burden of synchronizing 127 devices to the host with software, yet still fails to maintain synchrony between the devices as, to the host, the individual devices represent separate processes.
Devices that contain a physical transducer, such as a laser diode or a photodetector, may require clock and trigger information. A device such as a laser diode with a modulated light output at 1 MHz may use a clock signal to perform transducer functions at regular intervals or at a constant frequency. A trigger signal is usually used to start or end an operation at a set time. In the laser diode example, a trigger signal could be used to turn the modulated light output on or off.
These clock and trigger signals can be used to synchronize a multiplicity of devices to each other (and hence constitute what is referred to below as “synchronization information”), provided that the signals are common and simultaneous to all devices. ‘Common’ and ‘simultaneous’ here mean that the variation in time of these signals between the devices is less than a specified quantity, δt. In the laser diode example, this would enable a multiplicity of laser diodes to modulate their light output at one frequency. The modulation frequency of all devices would be the same, and their waveforms would be in-phase. The current USB specification (viz. 2.0) allows for a δt of up to 0.35 μs. For a signal with a frequency of 1 MHz and a period of 1.0 μs, this delay represents almost half of the period. It is thus unusable as synchronization information for routine use.
Devices such as hubs and USB controller chips commonly use some amount of phase locking in order to decode the USB protocol. It is the purpose of the SYNC pattern in the USB protocol to provide a synchronization pattern for another electronic circuit to lock to. However, this is intended to synchronize the device to the USB bit streams to an accuracy sufficient to interpret MHz bit streams. It is not intended to synchronize two separate devices to each other to the level required by many test and measurement instruments. The USB specification—to the extent that it deals with inter-device synchronization—is mainly concerned with synchronizing a USB-CD audio stream sufficiently for output on a USB-speaker pair. The requirements of such an arrangement are in the kHz range and, for this application, the USB specification is satisfactory. However, the specification does not address the potential problems of synchronizing, for example, 100 USB-speaker pairs.
As discussed above, USB communication transfers data during regular 1 ms frames (or, in the case of the High-Speed USB specification, in eight micro-frames per 1 ms frame). A Start of Frame (SOF) packet is transmitted to all but Low-Speed devices at the beginning of each frame and to all High-Speed devices at the beginning of each micro-frame. The SOF packet therefore represents a periodic low resolution signal broadcast to all but Low-Speed devices connected to a given Host Controller.
This SOF packet broadcast occurs at a nominal frequency of 1 kHz (in the case of the High-Speed USB specification, 8 kHz). However the USB specification allows a very large frequency tolerance (by instrumentation standards) of some 500 parts per million. The background art utilises this low resolution frequency signal that is broadcast to each of the devices to provide clock synchronization, but only to the somewhat ambiguous frequency provided by the USB Host Controller.
U.S. Pat. No. 6,343,364 (Leydier et al.) discloses an example of frequency locking to USB traffic, which is directed toward a smart card reader. This document teaches a local, free-running clock that is compared to USB SYNC and packet ID streams; its period is updated to match this frequency, resulting in a local clock with a nominal frequency of 1.5 MHz. This provides a degree of synchronization sufficient to read smart card information into a host PC but, as this approach is directed to a smart card reader, inter-device synchronization is not addressed.
U.S. Pat. No. 6,012,115 and subsequent continuation U.S. Pat. No. 6,226,701 (Chambers et al.) address the USB SOF periodicity and numbering for timing. These documents disclose a computer system that can perform an accurate determination of the moment in time a predetermined event occurred within a real-time peripheral device by using the start of frame pulse transmitted from a USB host controller to peripheral devices connected to it.
However the methods taught by these documents do not involve the measurement of the frequency of a periodic data structure contained within the USB data traffic for determination of the absolute frequency of the master clock in the USB Host Controller, and in some cases rely on the provision of an additional counter in the host.
U.S. Pat. No. 6,092,210 (Larky et al.) discloses a method for connecting two USB hosts for the purpose of data transfer, by employing a USB-to-USB connecting device for synchronizing local device clocks to the data streams of both USB hosts. Phase locked loops are used to synchronize local clocks and over-sampling is used to ensure that data loss does not occur. This document, however, relates to the synchronization of the data streams of two USB hosts with each other (and with limited accuracy) such that transfer of information is then possible between said Hosts. This document does not teach any method for synchronizing a plurality of USB devices to a single USB Host or to a plurality of USB hosts.
The USB specification was written with audio applications in mind, and U.S. Pat. No. 5,761,537 (Sturges et al.) describes how to synchronize two or more pairs of speakers with individual clocks, where one pair operates off a stereo audio circuit in the PC and the other pair is controlled by the USB. Both speaker pairs use their own clocks, so they need to be synchronized; this document teaches one technique for maintaining synchronization of the audio signals despite possible clock skew between the asynchronous clocks.
U.S. patent application Ser. No. 10/620,769 (Foster et al.) discloses a synchronized version of the USB, in which the local clock of each device is synchronized on a given USB to an arbitrary degree. This document also discloses a method and apparatus for providing a trigger signal to each device within the USB such that an event may be synchronously initiated on multiple devices by the trigger signal.
However the latency associated with conventional USB messaging still prevents one USB device from receiving a trigger and distributing it to other devices with minimal latency. This precludes multiple USB data acquisition devices from making a measurement sample simultaneously and synchronously, within some nominal tolerance, when one of the devices receives an external trigger signal.
In a traditional rack-based measurement system such as VXI or PXI, there is a timing backplane in the rack that allows devices to share trigger signals between slots in the rack. USB does not have any of these capabilities and this has severely limited USB's application in data acquisition, measurement, automation and control applications.
FIG. 1 is a schematic diagram of a background art synchronized USB system 10, including a where a personal computer 12, containing a USB Host Controller having a USB, hosts a network of USB expansion hubs 14 and USB devices 16. Each of the USB devices 16 has its own respective local clock (not shown).
This architecture for synchronizing these local clocks relies on periodic data structures present in the USB traffic. Thus, a preferred embodiment of U.S. patent application Ser. No. 10/620,769 (Foster et al.) essentially locks the local clock in frequency and phase to the detection of a SOF packet token at the USB device; circuitry observes traffic through the USB and decodes a clock carrier signal from bus traffic (in the preferred embodiment comprising SOF packets) which results in a nominal carrier signal frequency of 1 kHz (or 8 kHz for USB High Speed). The local clock signal from a controlled oscillator clock is locked to the reception of the USB SOF packet in both phase and frequency. This ensuring that all devices attached to the root hub are locked in frequency to the point at which they receive the SOF packet token.
Another synchronized USB device, disclosed in WO 2007/092997 filed 15 Feb. 2007 (Foster et al.), employs a local reference clock register that is clocked from the synchronised local clock. A hybrid USB hub (comparable to USB hub 14 of FIG. 1) is disclosed, having an additional data pathway that allows control loop latency to be reduced. FIG. 2 is a schematic diagram of this hybrid USB hub 30, which has an upstream port 32, a plurality of downstream ports 34 a low latency data bypass port 36, conventional USB hub circuitry 38 and data bypass circuitry 40.
FIG. 3 is a detailed schematic of data bypass circuitry 40 of FIG. 2, simplified from WO 2007/092997 for clarity. Data bypass circuitry 40 has an upstream port 42 for connection to the Host Controller side of the bus, a downstream port 44 for connection to the device side of the bus (in the preferred embodiment this connects to a conventional USB hub circuitry chip), a low latency data bypass port 46 and a USB data multiplexer switch 48.
Thus, data bypass circuitry 40 is able to monitor all USB data packets and provide a buffered replica signal 50 of USB data signals for use by external circuitry. Buffered replica signal 50 can be used by external circuitry for decoding periodic signal structures from the Host Controller within USB data to identify carrier signals which contain information about the clock rate of the USB Host Controller. Buffered replica signal 50 can also be used to decode information from all downstream USB devices as it passes upstream toward the Host Controller. In this way, direct action can be taken on the information from downstream devices without first requiring the Host Controller and associated operating system to process and act on the data.
Data bypass circuitry 40 also includes additional circuitry for advanced data management, switching and reducing USB control loop latency, including a USB data multiplexing switch 48 (shown as a pair of simple single pole switches 52 and 54 of FIG. 3 for simplicity, though in reality USB data signals are differential). USB data multiplexing switch 48 contains an upstream switch 52 and a downstream switch 54, and is configured to synchronously direct USB data signals from upstream port 42 either directly to the downstream port 44 (the configuration shown) or utilising a bidirectional data stream 50 from external circuitry via bidirectional data port 46. Switch controller logic has not been shown for simplicity.
Data bypass circuitry 40 is also able to dynamically configure itself to insert data within a USB data stream. A message from the Host Controller to a device may be intercepted and altered by USB monitoring circuitry. In this way, software can be configured to provide regular polling of a particular USB device with a known data packet size. USB monitoring circuitry, having access to the size of a specified regularly polled packet, can insert data within the payload of a transaction by synchronously bypassing the direct connection (in the illustrated configuration of USB data switch 48) and inserting data into the payload field of the transaction.
While this system would achieve the desired outcome of reducing messaging latency in USB it requires special hardware to be included into a dedicated hybrid USB hub (or other device). Such hardware would preclude the system from reducing data acquisition messaging and triggering of multiple devices within arbitrarily small time frames using a conventional USB architecture.